The 6th International Workshop on
High Performance Interconnection Networks and Interconnects
CALL FOR PAPERS & PARTICIPATION
Submissions could be for full papers, short papers, poster papers, or posters
Paper Submissions: ------------------------------------------- 25 September 2020
Acceptance Notification: -------------------------------------- 09 October 2020
Camera Ready Papers and Registration Due by: ----------- 16 October 2020
Conference Dates: --------------------------------------------- 25 - 29 January 2021
International Program Committee*:
All submitted papers will be rigorously reviewed by the Workshop's technical program committee members following similar criteria used in HPCS 2020 and will be published as part of the HPCS 2020 Proceedings.
(* Committee formation is pending and will be finalized shortly.)
For information or questions about Conference's paper submission, tutorials, posters, workshops, special sessions, exhibits, demos, panels and forums organization, doctoral colloquium, and any other information about the conference location, registration, paper formatting, etc., please consult the Conference’s web site at URL: http://hpcs2020.cisedu.info/ or http://conf.cisedu.info/rp/hpcs20 or contact one of the Conference's organizers.
You are invited to submit original and unpublished research works on above and other topics related to high performance interconnection networks and interconnects. Submitted papers must not have been published or simultaneously submitted elsewhere until it appears in HPCS proceedings, in the case of acceptance, or notified otherwise. Submission can be for
- Regular papers, please submit a PDF copy of your full manuscript, not to exceed 8 double-column formatted pages per template, and include up to 6 keywords and an abstract of no more than 400 words. Additional pages will be charged additional fee. Submission should include a cover page with authors' names, affiliation addresses, fax numbers, phone numbers, and all authors email addresses. Please, indicate clearly the corresponding author(s) although all authors are equally responsible for the manuscript.
- Short papers (up to 4 pages), please submit a PDF copy of your full manuscript, not to exceed 4 double-column formatted pages per template, and include up to 6 keywords and an abstract of no more than 400 words. Additional pages will be charged additional fee. Submission should include a cover page with authors' names, affiliation addresses, fax numbers, phone numbers, and all authors email addresses. Please, indicate clearly the corresponding author(s) although all authors are equally responsible for the manuscript.
- Poster papers and Posters (please refer to http://hpcs2020.cisedu.info/1-call-for-papers-and-participation/call-for-posters for posters submission details) will also be considered.
Please specify the type of submission you have. Please include page numbers on all preliminary submissions to make it easier for reviewers to provide helpful comments.
Submit a PDF copy of your full manuscript to the Workshop's paper submission site at xxx. Acknowledgement will be sent within 48 hours of submission.
Only PDF files will be accepted, uploaded to the submission link above. Each paper will receive a minimum of three reviews. Papers will be selected based on their originality, relevance, significance, technical clarity and soundness, presentation, language, and references. Submission implies the willingness of at least one of the authors to register and present the paper, if accepted. At least one of the authors of each accepted paper will have to register and attend (virtually) the HPCS 2020 conference to present the paper at the Symposium as scheduled. By submitting the paper to the HPCS conference, all authors agree to abide by all HPCS conference paper submission, publication and presentation policies as well as following ethical and professional codes of conduct, including those of the professional co-sponsoring organizations. For more information, please refer to the Authors Info and Registration Info pages.
Accepted papers will be published in the Conference proceedings. Instructions for final manuscript format and requirements will be posted on the HPCS 2020 Conference web site. It is our intent to have the proceedings formally published in hard and soft copies and be available at the time of the conference. The proceedings is projected to be included in the IEEE or ACM Digital Library and indexed in all major indexing services accordingly.
Plans are underway to have the best papers, in extended version, selected for possible publication in a reputable journal as special issue. Detailed information will soon be announced and will be made available on the conference website.
If you have any questions about paper submission or the Workshop, please contact the Workshop's organizers.
SCOPE AND OBJECTIVES
Computational, storage, accelerators, and sensing resources are required to be interconnected in efficient ways in most complex systems such as data-centers and cloud infrastructures, data centers interconnects, cyber physical security systems, many-core processors, HPC and reconfigurable platforms.
This workshop is concerned with the design, analysis and evaluation of high performance interconnection networks and interconnects for such complex systems. Also of interest is to explore systems using high performance interconnection networks and interconnects. It is intended to serve as a forum to bring together researchers from academia and the experts from industry to present and discuss innovative ideas and solutions in high performance interconnection networks. These will be also critical on the march to Exascale era.
Selected high-quality papers from the workshop will be invited for extension and publication in a special issue in the International Journal Microprocessors and Microsystems and other well established scientific journals.
The HPINI Workshop topics include (but are not limited to) the following:
Multi-core on-chip Interconnects, Clusters Interconnects, Systems Interconnects, and Data Centers Interconnects
Hardware and software architectures and implementations for interconnection networks
On/Off-chip interconnection network architecture (topology, routing, arbitration, ...)
Interconnect Architectures to support Data Centers, Cloud & Grid Computing
(Self-aware) Quality of Service
Design, implementation, and evaluation of interconnect standards (InfiniBand, Ethernet, PCI-Express, HyperTransport)
Performance and Power Management Issues
High-bandwidth and Low-latency Interconnects
Interconnects for System-on-Chip
Asynchronous Interconnect Designs
Interconnect Systems Modeling and Simulation
Reliability, Scalability, Availability, and Fault Tolerance
(Self-aware) Reconfigurability Issues
Interconnects for Memory System Design and Optimizations
Flow Control and Congestion Management
Implementing HPIN with FPGAs
Data Center/Cloud and WAN networking and Interconnects
Edge and 5G networking and Interconnects
DPU and smartNICs
HPIN for Cyber Physical Systems
HPIN for Cyber Security
Application Specific HPIN
HPIN for Data Centers
Reconfigurable/Programmable Interconnect Components
Software defined networking and interconnects
Impact of the Interconnects on Application Performance
INSTRUCTIONS FOR PAPER SUBMISSIONS